Dielectric or passivation layers are often deposited on a semiconductor body using a chemical vapor deposition (CVD) process wherein solid dielectric films are formed on an integrated circuit wafer by the chemical reaction of vapor phase chemicals (reactants) that contain the required constituent gases. PECVD systems are categorized by pressure and by its method of energy input. PECVD systems do not rely solely on thermal energy, but instead use a radio-frequency (RF) induced glow discharge plasma to transfer energy into the reactant gases, allowing the integrated circuit wafer to remain at a lower temperature than in other processes.
Typically, in PECVD systems, the dielectric films are deposited in low frequency, lower power density batch reactors. Batch reactors accommodate a large number of wafers at the same time. In low power density processes, the RF power is distributed over large numbers of wafers, wherein each wafer is subjected to a low power density plasma. Under these conditions, the deposition time is long. Low frequency processes also have other drawbacks. In low frequency processes, the films tend to be very sensitive to the particular device pattern. In other words, a different process is required to fabricate each different type of device, where each wafer contains different device patterns. Secondly, low frequency processes tend to produce passivation films which are nonuniform across the wafer. The question of uniformity also arises where the wafer has a variety of devices on it with a varying structure density. Batch systems also have a higher wafer-to-wafer thickness nonuniformity as compared to single-wafer systems.
In conventional plasma processes, there is a trade-off between processing rate or throughput and the semiconductor device quality. To enhance the processing rate, the plasma density and ion flux should be increased. According to conventional plasma processing methods, increasing the RF power that produces the plasma increases ion density. Increasing the RF power to the plasma medium, however, also raises the average plasma ion energy levels, and ions with excessive directional energies (e.g. several hundred electron volts) may damage the semiconductor devices. This is because the ions are so energetic that upon impact they penetrate and cause irradiation damage to the semiconductor device surface. When this type of ion-induced radiation damage occurs, a post-fabrication cleansing or annealing process is necessary to minimize the adverse effects to semiconductor device performance. Moreover, many anisotropic plasma etch processes usually leave undesirable chemical deposits such as fluorohydrocarbons on the semiconductor wafer surface, resulting in manufacturing yield degradation. Ultimately, the manufacturer must remove these deposits from the semiconductor surface by some post-etch cleaning. In conventional plasma processing techniques, the plasma medium can interact with the plasma chamber walls, resulting in deposition of various contaminants (such as metals) onto the semiconductor wafer (contaminants are sputter etched from the plasma electrodes and reactor walls).
The combined effects of irradiation damage, formation of fluro-carbon films, plasma-induced contaminants, and other undesirable phenomena produce semiconductor devices with less than optimal performance yield. Thus, with conventional plasma-assisted processing techniques, increasing RF power to increase ion density with the intent to raise the process rate can have serious detrimental effects. If a method existed, however, to increase the plasma density and ion flux while controlling and confining the glow discharge, then a manufacturer could increase plasma-assisted processing rates without device yield degradation.
Therefore, a need exists for a method and apparatus to increase ion density near a semiconductor device during plasma-assisted processing without at the same time producing an unconfined glow discharge.
As mentioned earlier, another limitation of conventional plasma-assisted processes derives from the fact that, during these processes, plasma disperses throughout the fabrication process chamber. In so doing, it interacts with the process chamber walls. These walls contain various metals that the plasma species can remove via sputter etch or chemical reactions, transport to the semiconductor device surface, and embed into the semiconductor device. As a result, further semiconductor device degradation occurs.
Consequently, there is a need for a method and apparatus to prevent plasma interaction with fabrication reactor process chamber walls during plasma-assisted processing.
The present invention avoids these drawbacks of a high frequency, high RF power density single wafer PECVD process by operating the PECVD reactor under controlled conditions in which the glow discharge is confined and does not interact with the walls of the reactor, to fabricate a dielectric layer such as a passivation layer of oxynitride.
The present invention operates on single wafers, irrespective of device type, to produce a uniform dielectric film thereon. However the use of high frequency RF power in very large scale integration (VLSI) circuits normally presents problems with respect to damage to the circuit elements during plasma processing. The thin gate oxide (&lt;200.ANG.) commonly used as the gate insulator of FET transistors, for example, is susceptible to breakdown during processing steps in which the gate electrode is exposed to the processing plasma. In particular, the use of plasma enhanced chemical vapor deposition (PECVD) to deposit dielectric layers onto the transistor can result in damage and yield reduction if the glow discharge is not controlled and confined.